1) Field of the Invention
The invention relates to the field of semiconductor processing for transistors having thin channel regions.
2) Description of Related Art
The trend in the fabrication of complementary metal-oxide-semiconductor (CMOS) transistors is to have small channel regions. Examples of a transistor having a reduced body which includes the channel region along with a tri-gate structure are shown in U.S. 2004/0036127. Other small channel transistors are delta-doped transistors formed in lightly doped or undoped epitaxial layers grown on a heavily doped substrate. See, for instance, “Metal Gate Transistor with Epitaxial Source and Drain Regions,” application Ser. No. 10/955,669, filed Sep. 29, 2004, assigned to the assignee of the present application.
One problem with some of these devices is the generally high external resistance that comes about from the thinning of the source and drain regions, sometimes at the edges of the gates. Other devices have similar problems that result in higher external resistance, such as limited available cross-sectional area for source and drain regions. These problems are discussed in conjunction with FIGS. 1A and 1B.